Misunderstanding bitwise OR?

#1

I was tinkering with the blink starter example. My goal was “blink continuously when the button is idle; stay lit when the button is held”. What I got was “no light when the button is idle; blink when the button is held”. Where did I go wrong?

module fpga_top(
    input  wire WF_CLK,
    input wire WF_BUTTON,
    output reg  WF_LED
);

reg [23:0] counter;

always @ (posedge WF_CLK) begin
    WF_LED  <= counter[22] | WF_BUTTON;
    counter <= counter + 'b1;
end

endmodule
#2

The button connection to the FPGA is active low when pushed. So when it isn’t pushed a logic one is on WF_BUTTON. Or-ing that state into the WF_LED equation makes the WF_LED always logic one. So if you invert WF_BUTON, (add “~”), ~WF_BUTTON. You will get the behavior you wanted.

WF_LED is on when logic zero, and off when logic one.

Here are the schematics.
We will add a comment on the active states of the WF_BUTTON and WF_LED.