Recommendation for Simulation Analysis?

Verilog/VHDL Help
#1

It looks like the WebFPGA IDE doesn’t support any sort of simulation. So, do you recommend anything that that works well with WebFPGA? I did look at what IceStorm supports and there’s a lot of options.

I was playing around with code in Quartus and Vivado, then bring it over to WebFPGA and it doesn’t take to too many tweaks. So I can imagine coming up with an #include or something to pull in the globally defined variables and simply use top_fpga as the module name and get it to work in Quartus or Vivado. So you could do all of your simulation there and then bring it over to the WebFPGA IDE. But that seems to defeat the purpose of WebFPGA, which is to have a simple web-based interface without needing all of these tools. So I’m curious what you would recommend for the simulation and if you maybe have something that I missed.

I am new to FPGA and just trying to get my head around everything. Every book I have to learn Verilog (4 of them) introduces simulation very early on, so I’m not sure where to start with WebFPGA.

Any suggestions or guidance is much appreciated.

#2

Hi jrothlander,

I use and recommend iverilog and GTKWave, both are open source and work on various platforms such as windows and linux. They are vendor independent, so can be used with various FPGA vendors.

iverilog
GTKWave

This site has precompiled versions for windows. I use v11 which also installs GTKWave as well.
Windows Install

If I need to simulate a more complex design, I first create a simulation top and some stimuli and instantiate the top level verilog code. Once I am satisfied with the results I read the top level into WebFPGA to synthesis and flash. WebFPGA makes it easy to do the synthesis and flash steps. Design and verification steps need to be done on more complex designs as you have identified. We have plans to include some simulation and waveform viewer into WebFPGA.

In order to do this we need a framework which can be followed. I can post my basic framework, which will likely be close to the one integrated into WebFPGA. The framework needs to be flexible enough, but simple enough to be browser based.

Mick